Hardware Optimization of Finite Impulse Response Filters

The paper discusses hardware implementation algorithms for widely used half-band filters (HBF), such as the Coefficient Quantization Algorithm (CQA), the Multiple Constant Multiplication (MCM) algorithm, and their combination, CQA+MCM. The use of the CQA algorithm reduces the number of multipliers in the HBF filter structure. The MCM algorithm converts multipliers into a set of adders and bit shifts. Combining both algorithms allows for replacing all multipliers with a set of adders and bit shifts. A resource analysis was carried out for hardware implementations of 30th- and 94th-order HBF filters. It was found that the CQA algorithm reduces the number of multipliers by 37 % and 74 %, respectively. The MCM algorithm completely eliminates multipliers from the filter design, but the number of adders increases by 3x and 2.6x, respectively. A comparison with existing methods showed that the time required to compute the coefficients of the optimized filter using the proposed algorithms is only a few seconds, whereas most other methods take significantly longer (up to a full day). It was shown that the difference in the required resources does not exceed 10 %.